Company Name: NVIDIA•
Business Nature: Semiconductor
Company Address: http://www.nvidia.cn/page/contact_information.html•
Company Website: www.nvidia.com
Contact Person: Monser Lin•
Contact Number:86-755-26728478••
Position Now Open: Physical Design engineer; System Design Engineer; Compliance Engineer; etc.
Department: Engineering
Number of Vacancies: some
Type of Employment (graduate/part-time/summer/internships/co-op/others): Graduate•
Job Duties: http://nvidia.zhaopin.com/job.htm
Requirements (field of study, year of study, skills, languages, etc.) : http://nvidia.zhaopin.com/job.htm
Employment Period: 3 years
Work Location: Beijing; Shanghai; Shenzhen•
Working Hours:8h/day*5 days a week
Remuneration: Market Competitive•
Application Method:monlin@nvidia.com•
Application Deadline: Nov 19, 2010
Physical Design Engineer—Shanghai (we need so many talents for this position)
Job Description:
-Responsible for all aspects of physical design and implementation of GPU, and other ASICs targeted at the desktop, laptop, workstation, and mobile markets.
-Participating in efforts to establish CAD, design methodologies, and flow automation.
-Working on floorplan, power/clock distribution, chip assembly, placement, routing and timing closure .
-Working on static timing analysis, power/noise analysis and back-end verification.
Minimum Requirement:
-BSEE, MSEE is preferred
-Project experience in VLSI physical design implementation
-Courses taken in circuit design, device modeling, and digital design
-Knowledge of device model, processing technology, timing, noise and power in chip design
-Hand-on experience in EDA software from Synopsys (PC/ICC/DC/PT/STAR-RC), Cadence (First Encounter) or Magma (Talus) is preferred
-Proficient user of Perl or TCL is preferred
工作内容:
负责芯片物理设计及其实现的所有工作 （绘图芯片,桌面/笔记本/工作站/手持设备等ASIC芯片）
参与CAD， 设计方法，设计流程自动化的建立
致力于：
芯片规划及布局
电源/时钟分布及规划
布局布线及封装
芯片时序收敛
静态时序分析
功耗/噪声/信号完整性分析及后端验证
任职需求:
-电子工程或相关专业硕士生或本科生
-有VLSI芯片设计经验
-有相关课程背景：电路设计，器件模型，数字电路
-拥有以下知识：器件模型，制造工艺，时序检查，功耗及噪声分析
-有相关EDA工具使用经验：Synopsys (PC/ICC/DC/PT/STAR-RC), Cadence (First Encounter)， Magma (Talus)
-具有脚本编写能力者优先：Perl， TCL
GPU-ASIC-Physical Design Engineer—Shanghai
- Chip level Integration
--Formal Verification
- Work in conjunction with Place and Route Engineers to achieve timing closure for both partition level and full chip level
- Develop and enhance entire timing closure flow from frontend (pre-layout) to backend (post-layout) at both chip and block level.
- Develop custom timing scripts using tcl/primetime for clock skew analysis, special circuits such as clock dividers, core logic <-> IO macros interfaces such as PCI-E, Frame-Buffer/Memory, TMDS, etc.
- Develop flow to physically partition and floorplan the entire chip.
MINIMUM REQUIREMENTS:
-BSEE, MSEE is preferred
-Project experience in IC design implementation
-Courses taken in circuit design, digital design
-Hand-on experience in EDA software from Synopsys (DC/PT/Formality), Cadence (LEC) preferred
-Proficient user of Perl or TCL is preferred
工作职责:
-芯片集成，逻辑等价性验证
-芯片物理实现模块划分
-芯片级和模块级时序分析和时序收敛
-高速时钟电路的时序分析和时序收敛
-流程开发,芯片集成，时序分析和时序收敛，模块划分
任职需求:
-电子工程或相关专业硕士生或本科生
-有芯片设计经验
-有相关课程背景：电路设计，数字电路
-有相关EDA工具使用经验：Synopsys (DC/PT/Formality), Cadence (LEC)
-具有脚本编写能力者优先：Perl， TCL
Design Engineer—Shenzhen
RESPONSIBILITIES:
- Hardware Design for Graphics card and Mobile Device (Smartphone, PDA, MID, Net-book)
- Board level circuit research and Development
- Schematic concept design, Component selection and Bill of Material generation
- Board level Hardware debug and verification
- Responsible for product design issue in overall life time cycle
- Guide PCB layout engineer for placement, power and high speed signals routing
- Guide design Validation engineer for signal measurement
- Co-work with chip solution team for chip level bring up
- Co-work with BIOS & driver engineer on debug and FA
MINIMUM REQUIREMENTS:
- BS/MSEE
- Can do attitude
- High energy
- Leadership
- Ability to learn complex concepts in a fast pace environment
- Strong desire on creativity
- Quick thinking and good decision making skills
- Good communication skills (written and oral)
工作职责:
- 显卡,智能手机, PDA, MID, 上网本等的硬件设计.
- 板卡级硬件电子电路以及电源的开发与研究.
- 原理图设计,元器件选择,创建生产材料清单.
- 板卡级硬件电子电路以及电源的调试和验证.
- 负责解决在整个产品生命周期内的设计问题.
- 设定和设置PCB布线规则, 并指导PCB设计工程师进行PCB布局设计以及电源和高速信号布线.
- 指导测试工程师作信号测量,并分析测试结果.
- 与SI/EMC团队合作进行信号和电源的完整性分析以及电磁兼容性设计
- 与芯片设计团队合作,调试新芯片。
- 与BIOS和驱动软件工程师合作,分析解决问题.
职位要求:
- 大学本科/研究生. 电气工程,计算机技术或相关专业.
- 做事积极,进取,有活力.
- 有一定的领导才能.
- 有很强的学习和自学能力.
- 渴望创新.
- 思维敏捷,做事果断.
- 良好的沟通能力。良好的英文读写和口语能力.
PCB Design Engineer—Shenzhen
Job Description:
As the board level PCB design engineer role, this position is responsible for all NVIDIA chip solutions' projects PCB design. The job is taking the responsibility of transferring the schematic design into the printed circuit board basing on signal integrity requirement, power integrity requirement, EMC regulatory requirement, manufacture requirement and end-user usability requirement.
Qualifications:
- Bachelor or Master Degree in Electronics Engineering
- Strong knowledge on the circuit theory, especially for analog circuit design
- Good knowledge on the DC-DC power design
- Good knowledge on the signal integrity theory
- Good knowledge on the power integrity theory
- C is must, C++ and JAVA are preferred, Direct x is a plus.
- Good knowledge on the EMC, EMI, Safety techniques
- Good knowledge on PCB fabrication and assembly.
- Good knowledge on PC architecture,
- Can do attitude
- High energy, Ability to learn complex process and concept in a fast pace environment
- Quick thinking and good decision making skills
- Self-motivated, patient, desire to take challenges.
- Good communication skills ( Written and oral)
- Level 4 or 6 English
工作职责：
1.跨事业群设计显卡，三维眼镜，消费及移动设备，包含智能手机，掌上电脑，移动电脑等
2.通过对高密度，高频电子电路设计与研究，定义线路板设计规则并付诸应用
3.基于生产制造需求，安装需求和测试需求设计线路板
4.设计两维和三维的设计零件库
5.新料件的机构属性认证
6.和线路设计工程师协作，应用电路功能设计
7.和信号工程师，电磁认证工程师协作，实现产品对电源，信号完整性的需求设计
8.做信号分析和电源分析，优化板极设计
9.芯片封装设计
任职要求：
1.电子工程或微电子或机电一体化等专业本科或硕士学历
2.良好的英语写作能力和口语能力，国家4级或6级
3.善于沟通，敢说，敢做，有耐心，态度端正，精力充沛
4.电路理论，微电子学，模拟电路，数字电路等基础理论扎实
5.电磁场理论扎实
6.快速思考能力突出，判断能力突出
7.有板极设计经验者优先
System Design Engineer--Shenzhen
Job Description:
Designs, defines and implements complex system requirements for customers. Supports the entire product lifecycle from New Product Introduction to obsolescence.
Responsibilities:
- Prepares studies, analyzes existing systems and uses this data to meet customer specifications
- Qualify memory subsystem on NVIDIA boards
- Determines system specifications and working parameters for hardware/software compatibility
- Collect and analyze signal integrity data using high speed oscilloscopes
- Work with NVIDIA engineering groups to support released boards
- Work with new derivative boards or new boards with alternate components
- Collect and analyze signal integrity of affected circuits using advanced test equipment
- Work with SW team to generate BIOS and ensure BIOS works on new boards
- Develops, recommends and implements corrective actions
Minimum requirements:
BSEE (or equivalent) required.
Have the ability to work well in a team environment.
Have good written and verbal communication skills.
工作职责:
-为客户设计、确定并完善复杂的系统需求；
-为新产品从推出到淘汰的整个周期提供技术支持。
-研究分析现存系统并使用这些数据满足客户的技术规格要求。
-限定NVIDIA主板的存储器子系统。
-确定软硬件的系统技术规格和工作参数
-使用示波器收集并分析信号整合数据
-和NVIDIA工程组一起工作以支持released boards。
-处理新衍生板或带选择性元件的新主板
-使用先进设备收集并分析受感染电路的信号整合
-和SW组一起建立BIOS并确保其在新主板上正常工作
-开发、推荐并完善改进措施。
任职要求：
-BSEE或同等学历。
-良好的团队协作能力。
-良好的口语和书写交流能力。
